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ChipScope
 
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Course Number564
Price NIS before VAT / Tcs1260 / 3
Duration (Days)1
LanguageEnglish/Hebrew
Level 
JanFebMarAprMayJun
  30  21 29
 
JulAugSepOctNovDec
      
+972 3 9247780 ext. 207
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As FPGA designs become increasingly more complex, designers are searching to reduce design and debug time. The powerful, yet easy-to-use ChipScope™ Pro tool solution helps minimize the amount of time required for debug and verification. This one-day course will show you effective ways to debug logic and high-speed designs—thereby decreasing your overall design development time. This training will provide hands-on labs that demonstrate how the ChipScope Pro tools can address advanced verification and debugging challenges.

Software Tools

  • Xilinx ISE 9.2i
  • ChipScope Pro 9.2
  • ChipScope Pro 9.2 Serial I/O Toolkit 9.2i

Skills Gained

  • Maximize ChipScope Pro tool core performance, minimize negative timing impacts on a design, use techniques that enhance and extend the capabilities of the ChipScope Pro tools, enable and identify the advantages of remote debugging, analyze, set up, and debug high-speed serial I/O designs
 

 

  • Agenda and Introduction
  • Lab: Adding the ILA Core to an Existing Design and/or Adding the ILA and VIO Cores for Remote Monitoring and Control
  • Timing Implications
  • Demo: Minimizing ILA Core Impact with the PlanAhead Software
  • Tips and Tricks
  • Lab: Tips and Tricks
  • Remote Debug
  • Lab: Enabling Remote Debug
  • High-Speed Serial I/O Debug and Verification (Optional*)
  • Lab: High-Speed Serial I/O Debug and Verification (Optional*)
  

Lab Descriptions

  • Adding the ILA Core to an Existing Design – You will use the Core Inserter tool flow for adding the ChipScope Pro tool ILA cores into a design to rapidly locate and solve a simple logic problem.
  • Adding the ILA and VIO Cores for Remote Monitoring and Control – You will instantiate ICON, ILA, and VIO cores into a VHDL or Verilog design and practice monitoring signals of interest and externally driving select control signals.
  • Tips and Tricks – This lab demonstrates the flexibility of the ChipScope Pro tool solution as you explore data qualification, cross-clock domain analysis, and oversampling techniques
  • Enabling Remote Debug* –This lab demonstrates how the ChipScope Pro tools can be used across a network. You will connect to another team’s board, download your bitstream, and remotely monitor the other team’s board on your machine.
  •  High-Speed Serial I/O Debug and Verification* – You will use the Xilinx ChipScope Pro Serial I/O Toolkit for the RocketIO transceivers in the Virtex-5 FPGA. You will generate the ChipScope Pro tool IBERT design for the Virtex-5 XC5VLX50T device and customize it for the ML505 board. You will then connect two GTPs on the ML505 board and use the ChipScope Pro Analyzer tool to control the GTP parameters and monitor the effects.
  • Logic, high-speed, and embedded designers looking to minimize debug and verification time
  • FPGA design experience or completion of the Xilinx Fundamentals of FPGA Design course ChipScope Pro Software REL strongly recommended
 
 
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