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The DSP Design Flow course provides the advanced tools and expertise you need to
develop advanced, low-cost DSP designs. This intermediate course in implementing DSP functions focuses on learning how
to use System Generator for DSP, design implementation tools, HDL co-simulation,
and hardware-in-the-loop verification. Through hands-on exercises, you will
implement a design from algorithm concept to hardware verification by using
Xilinx FPGA capabilities.
Software Tools
- Xilinx ISE
- System Generator for DSP
- EDK
- ISIM Simulator
- ChipScope
- Mentor Graphics ModelSim PE
- MATLAB with Simulink
Skills Gained
- After completing this training, you will be able to: Describe the different
design flows for implementing DSP functions, with a large focus on System
Generator, Identify Xilinx FPGA capabilities and know how to implement a design
from algorithm concept to hardware simulation. Implement a design from start to
finish by using System Generator. Perform hardware-in-the-loop and HDL
co-simulations and improve productivity. Integrate the ChipScope Pro block in a
design and analyze the design. Develop a hardware co-simulation model using
System Generator Board Description Builder. Integrate a System Generator design
as a peripheral in a MicroBlaze processor-based system. Utilize timing analyzer
block to improve design performance.
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Note: Target architectures include Virtex-4, Virtex-II Pro, and Spartan-3E
FPGAs.
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Introduction
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DSP Design Flows in FPGAs
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Lab 1: Creating a 12 x 8 MAC Using the Xilinx System Generator
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Digital Filtering
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Lab 2: Designing a FIR Filter
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HDL Co-Simulation
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Lab 3: MAC FIR Filter Verification Using Simultaneous Co-Simulations
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Looking Under the Hood
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Lab 4: Looking Under the Hood
Controlling the System
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Lab 5: Controlling the System
Multirate Systems
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Lab 6: Designing a MAC-Based FIR Using the DSP48 Slice
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Advanced Features
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Lab 7: Integrating the ChipScope Pro Analyzer
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Lab 8: A System Generator Design as an XPS Peripheral
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Lab 9: Multiple Clock Domains Design Using Shared Memories
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Lab 10: Improving Design Performance Using Timing Analyzer
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Lab 11: Designing Using the PicoBlaze MicroController
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Lab 12: Creating Parametric Designs
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Lab Descriptions
- This lab-intensive class gives you hands-on experience by using System Generator
for DSP to visualize, simulate, verify, and implement DSP algorithms in Xilinx
FPGAs.
- The labs start at a descriptive level and build on each other. You should expect
each successive lesson’s challenges to increase. In addition, the labs included
in the Advanced Features module provide you experience with other tools such as
the ChipScope Pro analyzer and the Embedded Development Kit. System Generator
for DSP 8.1 features are identified, including hardware and software
co-simulation verification.
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- System engineers/designers, logic designers, and experienced hardware engineers
who are implementing DSP algorithms using MathWorks MATLAB and Simulink and
using Xilinx System Generator for DSP
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- Fundamentals of MATLAB/Simulink and Xilinx FPGAs
- Basics of digital signal processing theory for functions, such as FIR (Finite
Impulse Response) filters, oscillators and mixers, and FFT (Fast Fourier Transform)
algorithms
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